Responsibilities:
• Manage a team of 5-10 engineers who are working to architect high performance & highly resilient architectures using complex core FPGAs, DSPs & other hardware components
• Lead and mentor team in the design, development and testing of these complex systems
... • Work hands-on and mentor team members in the lab to bring up, debug, and verify the correct functioning of the system at required performance/throughout & stability
• Active management of the team from tasks, schedules, structure and team growth perspective
• Active technical program management and tasks/goals alignment with other teams from US/CA
• Work with other engineers to identify & work on patenting unique & innovative solutions
• Participate in documentation of functional, design and test specifications
• Functional and feature ownership – direct accountability for project/feature delivery
Requirements:
• experience with Altera or Xilinx FPGA designs
• experience in team leading of 3-7 engineers
• Knowledge of CPU, memory, and microcontroller architectures and how to optimally interface FPGAs to CPUs, memories, and microcontrollers.
• Track record of architecting provably optimal designs, with minimum necessary complexity
• Experience working with and leading a team of engineers
• Experience working with a distributed, global organization.
• Excellent communication skills (written and verbal)
• Can handle multiple tasks well while mentoring and directing others
• BSEE, MSEE, or equivalent
Please send cv at mihaela.joian@innerlook.ro
• Manage a team of 5-10 engineers who are working to architect high performance & highly resilient architectures using complex core FPGAs, DSPs & other hardware components
• Lead and mentor team in the design, development and testing of these complex systems
... • Work hands-on and mentor team members in the lab to bring up, debug, and verify the correct functioning of the system at required performance/throughout & stability
• Active management of the team from tasks, schedules, structure and team growth perspective
• Active technical program management and tasks/goals alignment with other teams from US/CA
• Work with other engineers to identify & work on patenting unique & innovative solutions
• Participate in documentation of functional, design and test specifications
• Functional and feature ownership – direct accountability for project/feature delivery
Requirements:
• experience with Altera or Xilinx FPGA designs
• experience in team leading of 3-7 engineers
• Knowledge of CPU, memory, and microcontroller architectures and how to optimally interface FPGAs to CPUs, memories, and microcontrollers.
• Track record of architecting provably optimal designs, with minimum necessary complexity
• Experience working with and leading a team of engineers
• Experience working with a distributed, global organization.
• Excellent communication skills (written and verbal)
• Can handle multiple tasks well while mentoring and directing others
• BSEE, MSEE, or equivalent
Please send cv at mihaela.joian@innerlook.ro
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